1. Field of the Invention
The present invention relates to a compound semiconductor device and a method of manufacturing the same and, more particularly, to an improvement of a gate electrode arranged between source/drain electrodes and of a method of forming the gate electrode.
2. Description of the Related Art
A recess structure is conventionally known as a structure of an FET for obtaining a large power gain. According to this recess structure, a semiconductor region serving as a channel region is formed deeper than other semiconductor regions, and especially a source resistance of a surface depletion layer is reduced. Therefore, a transconductance gm can be increased, and a large power gain can be obtained.
Although the recess structure is generally and frequently used in a compound semiconductor device represented by a GaAs semiconductor device, some problems are posed in a manufacturing method of the recess structure.
According to a conventional manufacturing method, after an active layer is formed by a predetermined compound semiconductor, a source/drain electrode pattern is formed. A resist pattern of a gate electrode pattern is formed, and wet etching for obtaining a recessed groove (to be referred to as a groove) is performed using the resist pattern as a mask. A gate electrode is formed using a lift-off technique.
According to the conventional manufacturing method, the gate electrode can be formed to be self-aligned in the groove. However, the gate electrode cannot be formed to be self-aligned to the source/drain electrodes. For this reason, distances between the gate and source electrodes and between the gate and drain electrodes are different from each other. For example, when the distance between the gate and drain electrodes is decreased, a breakdown voltage is decreased. At the same time, the distance between the gate and source electrodes is increased. For this reason, a source resistance is increased, and a current transconductance gm is decreased.
As a result, the obtained compound semiconductor device such as a MESFET or an HEMT has characteristic variations. In the worst case, the compound semiconductor device is not shipped as a product, therefore, a yield of the production is decreased.
As described above, according to the conventional method, after source/drain electrodes are formed, a new resist pattern is formed, and a gate electrode is formed using the pattern as a mask. Therefore, since a gate electrode is formed by mask alignment, distances between the gate and source electrodes and between the gate and drain electrodes are different from each other, thereby causing characteristic variations in semiconductor devices, variations in the distance between, e.g., gate and drain electrodes appear as variations in breakdown voltage, and variations in distance between gate and source electrodes cause variations in source resistance and appear as variations in high-frequency characteristic.